Wednesday, January 7, 2009

Logical Instruction Group

LOGICAL GROUP
This group of instructions provides the decision-making ability of the 8085, and includes some logically oriented utility instructions as well. By using these instructions, the condition flags may be set so that they can be tested by Jump-on-condition instructions. Unless otherwise noted, all the condition codes are affected. A few notes follow:
AND INSTRUCTIONS: The And Register (ANA r) and And Memory (ANA M) instructions perform a logical And function between the specified byte, either in a register or in the address contained in the H&L registers, and the contents of the accumulator. The accumulator must first be loaded with an initial value. The And function occurs on a bit-by-bit basis. The low order bit of the specified byte is Anded with the low order bit of the A register; if both the bit from the outside byte AND the bit from the A register are a 1, the bit in the A register is left as a 1. If either the bit position of the outside byte or the bit position in the A register, or both, contained 0’s, that bit position in the A register is reset to 0. Identical actions occur on the other seven bit positions at the same time. The result, left in the accumulator, is a bit pattern which indicates, with 1’s left on, in which positions of the bytes both the A register and the outside byte contained 1’s. This is valuable for testing the conditions of specific bits within a byte, and reacting accordingly. All condition flags are involved, but the Carry flag is always cleared by an And.
AND IMMEDIATE: The And Immediate (ANI data) instruction allows the programmer to match the byte in the accumulator with a fixed mask byte, contained in the second byte of the instruction. The A register must first be loaded with the byte to be tested. The Anding function occurs exactly as shown above. All condition flags are involved, but the Carry flag is cleared.
OR INSTRUCTIONS: The Or Register (ORA r) and Or Memory (ORA M) instructions perform inclusive Or’s between the specified byte, either in a register or in the address contained in the H&L registers, and the contents of the accumulator. The A register must be loaded with the first , value prior to the execution of these instructions. The Or function occurs on a bit-by-bit basis. The low order bit of the outside byte is Ored with the low order bit of the A register; if either the bit from the outside byte OR the bit from the A register is a 1, or both, that bit position is set to a 1 in the A register. If neither bit position from the outside bit or the A register is a 1, a 0 is loaded into that bit position of the A register. (Note that this satisfies the "one, the other, or both" requirements of an inclusive Or.) Identical operations occur on the other seven bit positions of the bytes. The result, left in the accumulator, is a bit pattern in which a 1 exists in any bit position in which either of the bytes also had a bit set. All condition flags are affected, but the Carry and Auxiliary Carry flags are always cleared.
OR IMMEDIATE: The Or Immediate (ORI data) instruction allows the programmer to match the contents of the accumulator against a fixed mask byte which is contained in the second byte of the instruction. The Or function occurs on a bit-by-bit basis, exactly as shown above. The first byte must be loaded into the A register prior to execution of the instruction. All condition flags are affected, but the Carry and Auxiliary Carry flags are always cleared.
EXCLUSIVE OR INSTRUCTIONS: The Exclusive Or Register (XRA r) and D Exclusive Or Memory (XRA M) instructions perform exclusive Or functions between a specified byte, either in a register or in a byte contained in the address in the H&L register, and the contents of the accumulator. The A register must be loaded with the first byte prior to the execution of the instruction. The Exclusive Or occurs on a bit-by-bit basis. The low order bit of the outside byte is XOred with the low bit of the accumulator; if the bit in the outside byte is a 1 and the position in the A register is a 0, or if the bit in the outside byte is a 0 and the position in the A register is a 1, a 1 is set into that bit in the A register. If the bits are either both 1’s or both 0’s, the bit position is reset in the A register. (Note that this agrees with the "one, the other, but not both, and not neither" parameters of an Exclusive Or.) Identical operations occur on the other bit positions of the bytes at the same time. The results are left in the accumulator, which contains a bit pattern with 1’s set where there was a 1 in either the A register or the outside byte, and 0’s set where there was either 0’s in both bytes or 1’s in both bytes, in the same bit position. All condition flags are affected, but the Carry and Auxiliary Carry flags are always cleared.
EXCLUSIVE OR IMMEDIATE: The Exclusive Or Immediate (XRI data) instruction allows the programmer to perform an Exclusive Or between a mask byte stored as the second byte of the instruction and the contents of the accumulator. The first byte must be loaded into the A register prior to the execution of the instruction. The Exclusive Or function occurs on a bit-by-bit basis exactly as outlined above. All the condition flags are affected, but the Carry and Auxiliary Carry flags are cleared.
COMPARE INSTRUCTIONS: The Compare Register (CMP r) and Compare Memory (CMP M) instructions compare the contents of the specified byte, either in a register or in the address contained in the H&L registers, to the contents of the accumulator. This is accomplished by subtracting the outside byte from the contents of the accumulator. The contents of the accumulator remain unchanged, and the actual answer of subtraction is lost. The condition flags are all affected, and are set to indicate the conditions of the lost answer. Particularly, the Zero flag, if set on, will indicate that the two values compared are equal, since the result of subtracting one from the other is zero. Also, the Carry flag will be set if the value in the A reg is smaller than the outside byte. If neither the Z nor the C flags are left on, the value in the A register is larger than the outside byte.
COMPARE IMMEDIATE: The Compare Immediate (CPI data) instruction compares the contents of the accumulator to a fixed value provided by the second byte of the instruction. The first value must be loaded into the A register prior to the execution of the instruction. The function occurs by a subtraction with lost answer, as described above. The contents of the A register are left unchanged. The condition codes act as above.
ROTATE INSTRUCTIONS: The Rotate Left (RLC) and Rotate Right (RRC) instructions rotate the accumulator’s contents one bit position left or right, respectively. In the RLC, all the bits move one position to the left; the high order bit which is shifted out of the A register is moved around to the low order bit position. It is also moved to the Carry flag. In the RRC, all the bits move one position to the right; the bit shifted out of the low order position of the A register is moved around to the high order position. It is also moved to the Carry flag. Thus, the Carry flag in either case indicates whether a bit was shifted out of the accumulator. Only the Carry flag is affected by these instructions.
ROTATE THROUGH CARRYS: The Rotate Left through Carry (RAL) and the Rotate Right through Carry (RAR) instructions rotate the accumulator’s contents one bit position left or right, respectively. Unlike the rotates above, however, these instructions use the Carry flag as a ninth bit in the circle. In the RAL, the bits in the A register are shifted left one position; the high order bit moved to the Carry flag; the Carry flag is moved to the low order position of the A register. In the RAR, the bits in the A register are shifted right one position; the low order bit is moved to the Carry flag; the Carry flag is moved to the high order position of the A register. Only the Carry flag is affected.
COMPLEMENT ACCUMULATOR: The Complement Accumulator (CMA) instruction provides a 1’s complement of the 8 bits in the A register, i.e., the 1’s are set to 0’s, and the 0’s are set to 1’s. A two’s complement may be effected by following the CMA with an INR A instruction. No condition flags are affected. CARRY INSTRUCTIONS: The Complement Carry (CMC) and Set Carry (STC) instructions allow direct control of the Carry flag by the programmer. The CMC will change the flag from 1 to 0, or 0 to 1, depending upon its initial condition. The STC forces the flag to a 1, regardless of its previous state. No other flags are affected.

2 comments:

  1. what does ORA A do........does it clear CY if so how...?!

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