Wednesday, January 7, 2009

Arithematic Instruction Group.

ARITHMETIC GROUP
This group provides the 8085 with mathematical ability to manipulate 8-bit data, and, by judicious use of the condition codes, to manipulate larger values. The A register (Accumulator) can perform true adds, subtracts, and compares. The other registers can only increment or decrement by 1. Unless otherwise indicated, all the condition code flags are affected. A few comments follow:
ADD INSTRUCTIONS: The Add Register (ADD r) and Add Memory (ADD M) instructions add the byte specified, either in a register or in the address contained by the H&L registers, into the accumulator. They assume that the accumulator already has in it the other value to participate in the add. The sum will remain in the accumulator. If the answer resulted in a ninth bit, it is stored in the Carry flag of the PSW.
ADD WITH CARRY: The Add Register with Carry (ADC r) and Add Memory with Carry (ADC M) instructions will add the specified byte, either in a register or in the address contained by the H&L registers, AND the value of the Carry bit, into the accumulator. By including the carry bit in the operation, mathematical operations on values longer than 8 bits are possible. As above, the first value must already be loaded in the A register prior to execution of these instructions. The sum remains in the accumulator. If the answer resulted in a ninth bit, it is stored in the Carry flag.
ADD IMMEDIATES: The Add Immediate (ADI) and Add Immediate with Carry (ACI) instructions provide a means of adding a fixed value into the accumulator. These instructions assume that an initial value has already been loaded into the accumulator. The immediate data is provided by the second byte of the instruction. The ACI instruction adds the immediate value and the value of the Carry flag, while the ADI does not take the Carry flag into account. The sum remains in the accumulator. If the answer resulted in a ninth bit, it is stored in the Carry flag.
SUBTRACT INSTRUCTIONS: The Subtract Register (SUB r) and the Subtract Memory (SUB M) instructions subtract the specified byte, in a register or in the address contained by the H&L registers, from the contents of the accumulator. The accumulator must have the first value already loaded , prior to the execution of the instructions. The subtract is accomplished by the complement-and-add technique, in which the two’s complement of the specified value is computed first, and then added to the contents of the A register. The Carry flag will be set to a 1 if a borrow was required during the subtraction.
SUBTRACT WITH BORROW: The Subtract Register with Borrow (SBB r) and the Subtract Memory with Borrow (SBB M) instructions will subtract the specified byte, either in a register or in the address contained in the H&L registers, and the value of the Carry flag, from the contents of the A register. The first value must be loaded into the A register prior to the execution of the instructions. The subtract is accomplished by the complement-and-add technique. The Carry flag will be set to a 1 if a borrow was required during the subtraction.
SUBTRACT IMMEDIATES: The Subtract Immediate (SUI data) and Subtract Immediate with Borrow (SBI data) instructions provide a means of subtracting a fixed value from the contents of the accumulator. The immediate value is provided by the second byte of the instruction. The first value must be loaded into the accumulator prior to the execution of the instructions. The subtract is accomplished by the complement-and-add technique. The SBI instruction will subtract both the immediate value and the contents of the Carry flag from the A register, while the SUI does not take the Carry flag into account. The Carry flag will be set at the end of the instruction if , a borrow was required during execution.
INCREMENT INSTRUCTIONS: The Increment Register (INR r) and Increment Memory (INR M) instructions provide a quick means of adding one to the contents of a register or memory location. These instructions allow the programmer to create counting routines and reiterations. Note that the Carry flag is not affected by these instructions.
DECREMENT INSTRUCTIONS: The Decrement Register (DCR r) and Decrement Memory (DCR M) instructions provide a quick means of subtracting one from the contents of a register or a memory location. These instructions allow the programmer to create counting routines and reiterations. Note that the Carry flag is not affected by these instructions.
REGISTER PAIR INSTRUCTIONS: The Increment Register Pair (INX rp) and Decrement Register Pair (DCX rp) instructions provide a means of adding to, or subtracting from, a 16-bit value contained in a register pair. In the INX instruction, this means that the carry from the sum of the low order byte of the pair and the one will be added into the upper byte automatically. In the DCX instruction, this means that a borrow from the high-order byte, if required, will be allowed into the low-order byte, if the subtraction of one from the low-order byte demands it. Note that none of the flags are affected.
D0UBLE ADD: The Add Register Pair to H&L (DAD rp) instruction adds a 16 bit value already existing in the BC or DE register pair into the 16-bit value contained in the H&L registers. The sum remains in the H&L registers. The Carry flag will be set if a carry occurred out of the high order byte; a carry from low- to high-order bytes within the add is taken into account automatically. This instruction allows a fixed index-like value to be added to the H&L registers for Register Indirect mode.
DECIMAL ADJUST: The Decimal Adjust Accumulator (DAA) instruction converts the 8-bit value in the A register, which normally is assumed to be two 4bit hexadecimal values, into two 4-bit BCD values. This allows the programmer to accept input data as BCD, process it in the accumulator using essentially hexadecimal arithmetic, and then convert the result back into BCD. This may be done by virtue of the fact that the ten numbers of BCD (0 to 9) are coded in binary exactly as are the first ten of the sixteen numbers of binary coded hexadecimal. i.e., adding 3810 and 3816 are exactly the same. The conversion be may accomplished by the use of the Auxiliary Carry flag. If the contents of the low-order four bits of the A register is >9, or if the AC flag is set, a value of 6 is added to these bits. Then the high-order four bits of the A register are examined; again, if they contain a value >9, or if the Carry flag is on, a 6 is added to them. The Carry flag, of course, indicates that the hexadecimal value of the byte before the instruction, when translated to BCD, is too large to fit in one byte.

1 comment:

  1. the reason why carry flag is not affected in INR r?

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